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ltc 5544 1 5544f typical a pplica t ion descrip t ion 4ghz to 6ghz high dynamic range downconverting mixer the lt c ? 5544 is part of a family of high dynamic range, high gain passive downconverting mixers covering the 600mhz to 6 ghz frequency range. the ltc5544 is optimized for 4ghz to 6 ghz rf applications. the lo frequency must fall within the 4.2 ghz to 5.8 ghz range for optimum performance. a typical application is a wimax receiver with a 5.15ghz to 5.35ghz rf input and low side lo. the ltc5544 is designed for 3.3 v operation, however; the if amplifier can be powered with 5 v for the higher p1db. the ltc5544s high level of integration minimizes the total solution cost, board space and system-level variation, while providing the highest dynamic range for demanding receiver applications. high dynamic range downconverting mixer family part # rf range lo range ltc5540 600mhz to 1.3ghz 700mhz to 1.2ghz ltc5541 1.3ghz to 2.3ghz 1.4ghz to 2.0ghz ltc5542 1.6ghz to 2.7ghz 1.7ghz to 2.5ghz ltc5543 2.3ghz to 4ghz 2.4ghz to 3.6ghz ltc5544 4ghz to 6ghz 4.2ghz to 5.8ghz fea t ures a pplica t ions n conversion gain: 7.4db at 5250mhz n iip3: 25.9dbm at 5250mhz n noise figure: 11.3db at 5250mhz n high input p1db n if bandwidth up to 1ghz n 640mw power consumption n shutdown pin n 50 single-ended rf and lo inputs n +2dbm lo drive level n high lo-rf and lo-if isolation n C40c to 105c operation (t c ) n small solution size n 16-lead (4mm 4mm) qfn package n 5ghz wimax/wlan receiver n 4.9ghz public safety bands n 4.9 ghz to 6ghz military communications n point-to-point broadband communications n radar systems l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. if amp if rf 5150mhz to 5350mhz lna bias synth v ccif 3.3v or 5v 22pf 1f 150nh 150nh 1nf 1nf 240mhz saw ltc6416 ltc2208 image bpf rf shdn 22pf shdn (0v/3.3v) ltc5544 v cc1 v cc 3.3v v cc2 lo 5010mhz 1.2pf 0.6pf if + if ? 5544 ta01a 1f lo adc 2.2nh wideband receiver wideband conversion gain, iip3 and nf vs if output frequency if output frequency (mhz) 205 6.5 g c (db) 8.3 8.1 7.9 7.7 7.5 7.3 7.1 6.9 6.7 8.5 9 iip3 (dbm), ssb nf (db) 27 25 23 21 19 17 15 13 11 29 215 275 225 235 245 5544 ta01b 255 265 nf g c f lo = 5010mhz p lo = 2dbm rf = 5250 35mhz test circuit in figure 1 iip3
ltc 5544 2 5544f p in c on f igura t ion a bsolu t e maxi m u m r a t ings mixer supply voltage (v cc 1 , v cc 2 ) ........................... 4.0 v if supply voltage ( if + , if C ) ...................................... 5. 5 v shutdown voltage ( shdn ) ................ C 0.3 v to v cc +0.3 v if bias adjust voltage ( ifbias ) ......... C 0.3 v to v cc +0.3 v lo bias adjust voltage ( lobias ) ...... C 0.3 v to v cc +0.3 v lo input power (4 ghz to 6 ghz ) ........................... +9 db m lo input dc voltage ............................................... 0 .1 v rf input power (4 ghz to 6 ghz ) ......................... +1 5 dbm rf input dc voltage ............................................... 0 .1 v temp diode continuous dc input current ............. 10 ma t emp diode input voltage ........................................ 1 v o perating temperature range (t c ) ........ C40 c to 105 c storage temperature range .................. C 65 c to 150 c junction temperature (t j ) .................................... 150 c (note 1) 16 15 14 13 5 6 7 8 top view 17 gnd uf package 16-lead (4mm 4mm) plastic qfn 9 10 11 12 4 3 2 1gnd rf ct shdn temp gnd lo gnd ifbias if + if ? ifgnd v cc1 lobias v cc2 gnd t jmax = 150c, jc = 8c/w exposed pad (pin 17) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking package description case temperature range ltc5544iuf#pbf ltc5544iuf#trpbf 5544 16-lead (4mm x 4mm) plastic qfn C40c to 105c consult lt c marketing for parts specified with wider operating temperature ranges. consult lt c marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ac e lec t rical c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, shdn = low, t c = 25c, p lo = 2dbm, unless otherwise noted. test circuit shown in figure 1. (notes 2, 3) parameter conditions min typ max units lo input frequency range 4200 to 5800 mhz rf input frequency range low side lo high side lo 4200 to 6000 4000 to 5800 mhz mhz if output frequency range requires external matching 5 to 1000 mhz rf input return loss z o = 50, 4000mhz to 6000mhz >12 db lo input return loss z o = 50, 4200mhz to 5800mhz >12 db if output impedance differential at 240mhz 332 || 1.7pf r || c lo input power f lo = 4200mhz to 5800mhz C1 2 5 dbm lo to rf leakage f lo = 4200mhz to 5800mhz, requires c2 38 db rf to if isolation f rf = 4000mhz to 6000mhz >29 db
ltc 5544 3 5544f low side lo downmixer application: rf = 4200mhz to 6000mhz, if = 240mhz, f lo = f rf C f if parameter conditions min typ max units conversion gain rf = 4900mhz rf = 5250mhz rf = 5800mhz 6.0 7.9 7.4 6.4 db conversion gain flatness rf = 5250mhz 30mhz, lo = 5010mhz, if = 240 30mhz 0.15 db conversion gain vs temperature t c = C40c to 105c, rf = 5250mhz C0.007 db/c 2-tone input 3 rd order intercept (?f = 2mhz) rf = 4900mhz rf = 5250mhz rf = 5800mhz 25.4 25.9 25.8 dbm 2-tone input 2 nd order intercept (?f = 241mhz, f im2 = f rf1 C f rf2 ) f rf1 = 5371mhz, f rf2 = 5130mhz, f lo = 5010mhz 43.2 dbm ssb noise figure rf = 4900mhz rf = 5250mhz rf = 5800mhz 10.3 11.3 12.8 db ssb noise figure under blocking f rf = 5250mhz, f lo = 5010mhz, f block = 4910mhz, p block = 5dbm 16.9 db 2rf C 2lo output spurious product (f rf = f lo + f if /2) f rf = 5130mhz at C10dbm, f lo = 5010mhz, f if = 240mhz C58.3 dbc 3rf C 3lo output spurious product (f rf = f lo + f if /3) f rf = 5090mhz at C10dbm, f lo = 5010mhz, f if = 240mhz C77 dbc input 1db compression rf = 5250mhz, v ccif = 3.3v rf = 5250mhz, v ccif = 5v 11.4 14.6 dbm ac e lec t rical c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, shdn = low, t c = 25c, p lo = 2dbm, p rf = C3dbm (C3dbm/tone for 2-tone tests),unless otherwise noted. test circuit shown in figure 1. (notes 2, 3) high side lo downmixer application: rf = 4000mhz to 5800mhz, if = 240mhz, f lo = f rf + f if parameter conditions min typ max units conversion gain rf = 4500mhz rf = 4900mhz rf = 5250mhz 8.0 7.7 7.3 db conversion gain flatness rf = 4900mhz 30mhz, lo = 5356mhz, if = 456 30mhz 0.15 db conversion gain vs temperature t c = C40c to 105c, rf = 4900mhz C0.005 db/c 2-tone input 3 rd order intercept (?f = 2mhz) rf = 4500mhz rf = 4900mhz rf = 5250mhz 24.2 25.1 24.0 dbm 2-tone input 2 nd order intercept (?f = 241mhz, f im2 = f rf2 C f rf1 ) f rf1 = 4779mhz, f rf2 = 5020mhz, f lo = 5140mhz 39.8 dbm ssb noise figure rf = 4500mhz rf = 4900mhz rf = 5250mhz 10.7 11.0 11.7 db 2lo C 2rf output spurious product (f rf = f lo C f if/2 ) f rf = 5020mhz at C10dbm, f lo = 5140mhz f if = 240mhz C55 dbc 3lo C 3rf output spurious product (f rf = f lo C f if/3 ) f rf = 5060mhz at C10dbm, f lo = 5140mhz f if = 240mhz C75 dbc input 1db compression rf = 4900mhz, v ccif = 3.3v rf = 4900mhz, v ccif = 5v 11.3 14.5 dbm
ltc 5544 4 5544f d c e lec t rical c harac t eris t ics v cc = 3.3v, v ccif = 3.3v, shdn = low, t c = 25c, unless otherwise noted. test circuit shown in figure 1. (note 2) parameter conditions min typ max units power supply requirements (v cc , v ccif ) v cc supply voltage (pins 5 and 7) 3.1 3.3 3.5 v v ccif supply voltage (pins 14 and 15) 3.1 3.3 5.3 v v cc supply current (pins 5 + 7) v ccif supply current (pins 14 + 15) total supply current (v cc + v ccif ) 96 98 194 116 122 238 ma total supply current C shutdown shdn = high 500 a shutdown logic input (shdn) low = on, high = off shdn input high voltage (off) 3.0 v shdn input low voltage (on) 0.3 v shdn input current C0.3v to v cc + 0.3v C20 30 a turn on time 0.6 s turn off time 0.6 s temperature sensing diode (temp) dc voltage at t j = 25c i in = 10a i in = 80a 726.1 782.5 mv mv voltage temperature coefficient i in = 10a i in = 80a C1.73 C1.53 mv/c mv/c note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc5544 is guaranteed functional over the C40c to 105c case temperature range. note 3: ssb noise figure measurements performed with a small-signal noise source, bandpass filter and 6db matching pad on rf input, 6db matching pad on the lo input, bandpass filter on the if output and no other rf signals applied. v cc supply current vs supply voltage (mixer and lo buffer) v ccif supply current vs supply voltage (if amplifier) total supply current vs temperature (v cc + v ccif ) typical d c p er f or m ance c harac t eris t ics shdn = low, t est circuit shown in figure 1. 90 100 98 96 94 92 102 v cc supply voltage (v) 3.0 supply current (ma) 3.1 3.5 3.6 3.2 3.3 5544 g01 3.4 t c = 105c t c = ?40c t c = 85c t c = 25c 75 supply current (ma) 125 115 105 95 85 135 5544 g02 v ccif supply voltage (v) 3.0 3.3 5.1 5.4 3.6 3.9 4.2 4.5 4.8 t c = 105c t c = ?40c t c = 85c t c = 25c ?40 100 0 40 ?20 20 60 80 120 case temperature (c) 170 supply current (ma) 210 200 180 190 220 5544 g03 v cc = 3.3v, v ccif = 5v (dual supply) v cc = v ccif = 3.3v (single supply)
ltc 5544 5 5544f typical ac p er f or m ance c harac t eris t ics input p1db vs rf frequency ssb nf and dsb nf vs rf frequency 5250mhz conversion gain, iip3 and nf vs lo power low side lo v cc = 3.3v, v ccif = 3.3v, shdn = low, t c = 25c, p lo = 2dbm, p rf = C3dbm (C3dbm/tone for two-tone iip3 tests, ? f = 2mhz), if = 240mhz, unless otherwise noted. test circuit shown in figure 1. conversion gain and iip3 vs rf frequency conversion gain and iip3 vs rf frequency conversion gain and iip3 vs rf frequency rf frequency (ghz) 4.2 iip3 (dbm) 23 25 27 5.8 21 19 17 4.4 4.6 4.8 5.0 5.2 5.4 5.6 6.0 5544 g04 g c (db) 5 13 11 9 7 15 iip3 g c p lo = ?1dbm p lo = 2dbm p lo = 5dbm rf frequency (ghz) 4.2 iip3 (dbm) 23 25 27 5.8 21 19 17 4.4 4.6 4.8 5.0 5.2 5.4 5.6 6.0 5544 g05 g c iip3 g c (db) 5 13 11 9 7 15 v cc = 3.1v v cc = 3.3v v cc = 3.5v v cc = v ccif rf frequency (ghz) 4.2 iip3 (dbm) 23 25 27 5.8 21 19 17 4.4 4.6 4.8 5.0 5.2 5.4 5.6 6.0 5544 g06 g c iip3 g c (db) 5 13 11 9 7 15 t c = ? 40c t c = 25c t c = 85c t c = 105c rf frequency (ghz) 4.2 input p1db (dbm) 14 15 16 5.8 12 13 11 10 9 4.4 4.6 4.8 5.0 5.2 5.4 5.6 6.0 5544 g07 v ccif = 5v v ccif = 3.3v p lo = ?1dbm p lo = 2dbm p lo = 5dbm rf frequency (ghz) 4.2 ssb nf, dsb nf (db) 12 14 5.6 10 8 4.6 5.0 4.4 4.8 5.2 5.8 5.4 6.0 2 0 6 16 4 5544 g08 ssb nf dsb nf t c = ? 40c t c = 25c t c = 85c t c = 105c lo input power (dbm) ?3 g c (db), iip3 (dbm) 14 24 26 28 ?1 1 3 10 20 12 22 8 6 18 16 ssb nf (db) 8 18 20 22 4 14 6 16 2 0 12 10 ?2 0 5 7 2 4 6 5544 g09 iip3 nf g c t c = ? 40c t c = 25c t c = 85c
ltc 5544 6 5544f 5250mhz conversion gain histogram 5250mhz iip3 histogram 5250mhz ssb nf histogram typical ac p er f or m ance c harac t eris t ics low side lo (continued) v cc = 3.3v, v ccif = 3.3v, shdn = low, t c = 25c, p lo = 2dbm, p rf = C3dbm (C3dbm/tone for two-tone iip3 tests, ? f = 2mhz), if = 240mhz, unless other wise noted. test circuit shown in figure 1. ssb noise figure vs rf blocker level lo to rf leakage vs lo frequency rf/lo isolation rf blocker power (dbm) ?25 10 ssb nf (db) 15 16 17 18 19 14 13 12 11 20 ?20 5 ?15 ?10 ?5 5544 g13 0 rf = 5250mhz lo = 5010mhz blocker = 4910mhz p lo = 2dbm p lo = ?1dbm p lo = 5dbm lo frequency (ghz) 4.2 ?50 ?10 0 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 5544 g14 c2 = open lo to rf leakage (dbm) ?20 ?30 ?40 c2 = 0.6pf c2 = 1pf c2 = 0.4pf rf/lo frequency (ghz) 4.24.0 50 60 4.4 4.6 4.8 5.0 5.2 5.4 5.6 5.8 6.0 5544 g15 rf to lo isolation (db) 40 30 20 rf to if lo to if conversion gain, iip3 and rf input p1db vs temperature single- tone if output power, 2 2 and 3 3 spurs vs rf input power 2 2 and 3 3 spurs vs lo power case temperature (c) ?45 g c (db), iip3 (dbm), p1db (dbm) 14 24 26 28 ?5 35 75 10 20 12 22 8 6 18 16 ?25 15 115 55 95 5544 g10 v ccif = 5v v ccif = 3.3v iip3 p1db g c rf = 5250mhz rf input power (dbm) ?12 output power (dbm) ?40 10 20 ?6 0 6 ?60 ?10 ?50 0 ?70 ?80 ?20 ?30 ?9 ?3 12 15 3 9 5544 g11 if out (rf = 5250mhz) 2rf ? 2lo (rf = 5130mhz) 3rf ? 3lo (rf = 5090mhz) lo = 5010mhz lo input power (dbm) ?6 relative spur level (dbc) ?60 ?40 ?2 0 4 ?70 ?80 ?50 ?4 6 2 5544 g12 rf = 5250mhz p rf = ?10dbm 2rf ? 2lo (rf = 5130mhz) 3rf ? 3lo (rf = 5090mhz) conversion gain (db) 6.8 0 distribution (%) 20 15 10 5 40 35 30 25 45 7.1 7.3 7.5 7.6 6.9 7.2 7.4 7.87.7 7.9 7.0 5544 g16 rf = 5250mhz t c = 85c t c = 25c t c = ? 40c iip3 (dbm) 23.7 0 distribution (%) 20 15 10 5 25 24.9 25.7 26.5 26.9 24.1 25.3 26.1 24.5 5544 g17 rf = 5250mhz t c = 85c t c = 25c t c = ?40c ssb noise figure (db) 9.9 0 distribution (%) 20 15 10 5 40 35 30 25 45 11.1 11.9 10.3 11.5 12.3 12.7 10.7 5544 g18 rf = 5250mhz t c = 85c t c = 25c t c = ?40c
ltc 5544 7 5544f conversion gain and iip3 vs rf frequency conversion gain and iip3 vs rf frequency conversion gain and iip3 vs rf frequency input p1db vs rf frequency 5250mhz conversion gain, iip3 and nf vs lo power typical ac p er f or m ance c harac t eris t ics high side lo v cc = 3.3v, v ccif = 3.3v, shdn = low, t c = 25c, p lo = 2dbm, p rf = C3dbm (C3dbm/tone for two-tone iip3 tests, ? f = 2mhz), if = 240mhz, unless other wise noted. test circuit shown in figure 1. ssb nf and dsb nf vs rf frequency rf frequency (ghz) 4.2 4.4 4.0 4.6 4.8 5.0 5.2 5.4 5.6 5.8 5544 g22 9 15 16 input p1db (dbm) 13 14 12 11 10 v ccif = 5v v ccif = 3.3v p lo = ?1dbm p lo = 2dbm p lo = 5dbm rf frequency (ghz) 4.0 4.2 0 14 16 4.4 6.0 4.6 4.8 5.0 5.2 5.4 5.6 5.8 5544 g23 ssb nf, dsb nf (db) 10 12 8 6 4 2 dsb nf ssb nf t c = ? 40c t c = 25c t c = 85c t c = 105c lo input power (dbm) ?3 g c (db), iip3 (dbm) 13 23 25 ?1 1 3 9 19 11 21 7 5 17 15 ssb nf (db) 8 18 20 4 14 6 16 2 0 12 10 ?2 0 5 7 2 4 6 5544 g24 iip3 nf g c t c = ? 40c t c = 25c t c = 85c rf frequency (ghz) 4.0 iip3 (dbm) 22 24 26 5.6 20 18 16 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.8 5544 g19 g c (db) 5 13 11 9 7 15 iip3 g c p lo = ?1dbm p lo = 2dbm p lo = 5dbm rf frequency (ghz) 4.0 iip3 (dbm) 22 24 26 5.6 20 18 16 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.8 5544 g20 g c (db) 5 13 11 9 7 15 iip3 g c v cc = 3.1v v cc = 3.3v v cc = 3.5v v cc = v ccif rf frequency (ghz) 4.0 iip3 (dbm) 22 24 26 5.6 20 18 16 4.2 4.4 4.6 4.8 5.0 5.2 5.4 5.8 5544 g21 g c (db) 5 13 11 9 7 15 g c iip3 t c = ? 40c t c = 25c t c = 85c t c = 105c
ltc 5544 8 5544f p in func t ions gnd (pins 1, 8, 9, 11, exposed pad pin 17): ground. these pins must be soldered to the rf ground plane on the circuit board. the exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. rf (pin 2): single-ended input for the rf signal. this pin is internally connected to the primary side of the rf input transformer, which has low dc resistance to ground. a series dc-blocking capacitor should be used to avoid damage to the integrated transformer when dc voltage is present at the rf input. the rf input is impedance matched, as long as the lo input is driven with a 2dbm 5db source between 4.2ghz and 5.8ghz. ct (pin 3): rf transformer secondary center- tap . this pin may require a bypass capacitor to ground. see the applications information section. this pin has an internally generated bias voltage of 1.2 v. it must be dc-isolated from ground and v cc . shdn (pin 4): shutdown pin. when the input voltage is less than 0.3 v, the ic is enabled. when the input voltage is greater than 3 v, the ic is disabled. typical shdn pin input current is less than 10a . this pin must not be allowed to float. v cc1 ( pin 5) and v cc2 ( pin 7): power supply pins for the lo buffer and bias circuits. these pins are internally con- b lock diagra m nected and must be externally connected to a regulated 3.3v supply, with bypass capacitors located close to the pins. typical current consumption is 96ma. lobias (pin 6): this pin allows adjustment of the lo buffer current. typical dc voltage is 2.2v. lo (pin 10): single-ended input for the local oscillator. this pin is internally connected to the primary side of the rf input transformer, which has low dc resistance to ground. a series dc blocking capacitor must be used to avoid damage to the integrated transformer if dc voltage is present at the lo input. temp (pin 12): temperature sensing diode. this pin is connected to the anode of a diode that may be used to measure the die temperature, by forcing a current and measuring the voltage. ifgnd (pin 13): dc ground return for the if amplifier. this pin must be connected to ground to complete the if amplifiers dc current path. typical dc current is 98ma. if C (pin 14) and if + (pin 15): open-collector differential outputs for the if amplifier. these pins must be connected to a dc supply through impedance matching inductors, or a transformer center-tap. typical dc current consumption is 49ma into each pin. ifbias ( pin 16): this pin allows adjustment of the if amplifier current. typical dc voltage is 2.1v. rf ct shdn passive mixer v cc1 v cc2 gnd pins are not shown lo lobias temp if + ifbias if ? ifgnd exposed pad 5544 bd if amp 13 12 10 14 15 16 5 4 2 3 7 6 17 lo amp bias
ltc 5544 9 5544f tes t c ircui t rf gnd gnd bias dc1885a board stack-up (nelco n4000-13) 0.015? 0.015? 0.062? 4:1 t1 if out 240mhz 50 c5 l2 l1 c4 c8 17 gnd ltc5544 1 6 13 14 15 16 lo in 50 11 12 10 9 c3 c7 c6 5 7 8 4 v cc 3.1v to 3.5v shdn (0v/3.3v) 3 rf in 50 v ccif 3.1v to 5.3v l4 2 ifbias if + if ? lo gnd temp gnd v cc1 v cc2 lobias gnd ifgnd gnd rf ct shdn 5544 f01 c2 c1 ref des value size comments c1 0.6pf 0402 avx accu-p c2 open 0402 c3 1.2pf 0402 avx accu-p c4, c6 22pf 0402 avx c5 1000pf 0402 avx c7, c8 1f 0603 avx l1, l2 150nh 0603 coilcraft 0603cs l4 2.2nh 0402 coilcraft 0402hp t1 tc4-1w-7aln+ mini-circuits note: for if = 250mhz to 500mhz, use tc4-1w-17ln+ for t1 l1, l2 vs if frequencies if (mhz) l1, l2 (nh) 140 220 190 150 240 150 305 82 380 56 456 39 figure 1. standard downmixer test circuit schematic (240mhz if)
ltc 5544 10 5544f introduction the ltc5544 consists of a high linearity passive double- balanced mixer core, if buffer amplifier, lo buffer ampli- fier and bias/shutdown circuits. see the block diagram section for a description of each pin function. the rf and lo inputs are single-ended. the if output is differential. low side or high side lo injection can be used. the evaluation circuit, shown in figure 1, utilizes bandpass if output matching and an if transformer to realize a 50 single-ended if output. the evaluation board layout is shown in figure 2. a pplica t ions i n f or m a t ion figure 2. evaluation board layout rf input the mixers rf input, shown in figure 3, is connected to the primary winding of an integrated transformer. a 50 match is realized with a series capacitor ( c1) and a shunt inductor ( l4). the primary side of the rf transformer is dc-grounded internally and the dc resistance of the primary is approximately 2.4. a dc blocking capacitor is needed if the rf source has dc voltage present. the secondary winding of the rf transformer is internally connected to the passive mixer. the center-tap of the transformer secondary is connected to pin 3 ( ct) to allow the connection of bypass capacitor, c2. the value of c 2 is lo frequency-dependent and can be tuned for better lo leakage performance. when used, c2 should be located within 2 mm of pin 3 for proper high frequency decoupling. the nominal dc voltage on the ct pin is 1.2v. 5544 f02 for the rf input to be matched, the lo input must be driven. a broadband input match is realized with c1 = 0.6 pf and l4 = 2.2 nh. the measured rf input return loss is shown in figure 4 for lo frequencies of 4.4ghz, 5ghz and 5.6 ghz. these lo frequencies correspond to the lower, middle and upper values of the lo range. as shown in figure 4, the rf input impedance is somewhat dependent on lo frequency. the rf input impedance and input reflection coefficient, versus rf frequency, is listed in table 1. the reference plane for this data is pin 2 of the ic, with no external matching, and the lo is driven at 5ghz. ltc5544 c2 rf in ct rf to mixer 2 3 5544 f03 l4 c1 figure 3. rf input schematic figure 4. rf input return loss rf frequency (ghz) 4.0 4.2 35 5 0 4.4 6.0 4.6 4.8 5.0 5.2 5.4 5.6 5.8 5544 f04 rf port return loss (db) 15 10 20 25 30 lo = 4.4ghz lo = 5ghz lo = 5.6ghz
ltc 5544 11 5544f a pplica t ions i n f or m a t ion table 1. rf input impedance and s11 (at pin 2, no external matching, lo input driven at 5ghz) frequency (ghz) input impedance s11 mag angle 4.0 85.8 + j54.1 0.44 34.8 4.2 89.2 + j45.6 0.41 31.2 4.4 90.9 + j41.3 0.40 29 4.6 95.9 + j33.6 0.38 23.2 4.8 91.4 + j17.1 0.31 15.6 5.0 72.9 + j10.7 0.21 20.1 5.2 66.7 + j24.1 0.25 43.6 5.4 70.8 + j29.1 0.29 40.9 5.6 73.1 + j26.2 0.28 36.6 5.8 69.2 + j23.9 0.25 39.9 6.0 67.3 + j25.7 0.26 43.7 lo input the mixers lo input circuit, shown in figure 5, consists of a balun transformer and a two-stage high speed limiting differential amplifier to drive the mixer core. the ltc5544 s lo amplifiers are optimized for the 4.2 ghz to 5.8ghz lo frequency range. lo frequencies above or below this frequency range may be used with degraded performance. the mixers lo input is directly connected to the primary winding of an integrated transformer. a 50 match is realized with a series 1.2 pf capacitor ( c3). measured lo input return loss is shown in figure 6. the lo amplifiers are powered through v cc1 and v cc2 (pin 5 and pin 7). when the chip is enabled (shdn = figure 5. lo input schematic low), the internal bias circuit provides a regulated 4ma current to the amplifiers bias input, which in turn causes the amplifiers to draw approximately 90ma of dc current. this 4 ma reference current is also connected to lobias (pin 6) to allow modification of the amplifiers dc bias current for special applications. the recommended ap- plication circuits require no lo amplifier bias modification, so this pin should be left open-circuited. the nominal lo input level is +2 dbm although the limiting amplifiers will deliver excellent performance over a 3db input power range. lo input power greater than +5dbm may be used with slightly degraded performance. the lo input impedance and input reflection coefficient, versus frequency, is shown in table 2. table 2. lo input impedance vs frequency (at pin 10, no external matching) frequency (ghz) input impedance s11 mag angle 4.0 22.7 + j14.7 0.42 140.2 4.2 24.4 + j18.6 0.41 129.9 4.4 28.2 + j22.5 0.39 118.1 4.6 33.2 + j25.3 0.35 106.7 4.8 39.7 + j26.4 0.30 95 5.0 47.4 + j24.3 0.24 82.1 5.2 52.2 + j16.9 0.16 73.3 5.4 52 + j9.4 0.09 72.7 5.6 49.9 + j3.8 0.04 88.8 5.8 47.7 C j1 0.03 C156.5 6.0 44.2 C j6.2 0.09 C129.4 figure 6. lo input return loss lo in v cc1 v cc2 lo buffer to mixer ltc5544 lo lobias 5544 f05 10 7 5 bias 6 c3 4ma lo frequency (ghz) 4.0 4.2 5 0 4.4 6.0 4.6 4.8 5.0 5.2 5.4 5.6 5.8 5544 f06 lo port return loss (db) 15 10 20 25 30
ltc 5544 12 5544f a pplica t ions i n f or m a t ion if output the if amplifier, shown in figure 7, has differential open-collector outputs (if + and if C ), a dc ground return pin ( ifgnd), and a pin for modifying the internal bias (ifbias). the if outputs must be biased at the supply voltage (v ccif ), which is applied through matching induc- tors l1 and l2. alternatively, the if outputs can be biased through the center tap of a transformer. the common node of l1 and l2 can be connected to the center tap of the transformer. each if output pin draws approximately 49ma of dc supply current (98 ma total). ifgnd (pin 13) must be grounded or the amplifier will not draw dc current. for the highest conversion gain, high-q wire-wound chip inductors are recommended for l 1 and l 2, especially when using v ccif = 3.3 v. low cost multilayer chip inductors may be substituted, with a slight degradation in performance. grounding through inductor l3 may improve lo-if and rf-if leakage performance in some applications, but is otherwise not necessary. high dc resistance in l3 will reduce the if amplifier supply current, which will degrade rf performance. figure 7. if amplifier schematic with transformer-based bandpass match transformation. it is also possible to eliminate the if trans- former and drive differential filters or amplifiers directly. the if output impedance can be modeled as 332 in parallel with 1.7 pf at if frequencies. an equivalent small- signal model is shown in figure 8. frequency-dependent differential if output impedance is listed in table 3. this data is referenced to the package pins ( with no external components) and includes the effects of ic and package parasitics. figure 8. if output small-signal model table 3. if output impedance vs frequency frequency (mhz) differential output impedance (r if || x if (c if )) 90 351 || Cj707 (2.5pf) 140 341 || Cj494 (2.3pf) 190 334 || Cj441 (1.9pf) 240 332 || Cj390 (1.7pf) 300 325 || Cj312 (1.7pf) 380 318 || Cj246 (1.7pf) 456 304 || Cj205 (1.7pf) transformer-based bandpass if matching the if output can be matched for if frequencies as low as 40 mhz, or as high as 500 mhz, using the bandpass if matching shown in figures 1 and 7. l1 and l2 resonate with the internal if output capacitance at the desired if frequency. the value of l1, l2 is calculated as follows: l1, l2 = 1/[(2 f if ) 2 ? 2 ? c if ] where c if is the internal if capacitance ( listed in table 3). values of l1 and l2 are tabulated in figure 1 for various if frequencies 15 14 if + if ? r if c if ltc5544 5544 f08 4:1 t1 if out v cc c10 l2 l1 c8 l3 (or short) v ccif 13 14 15 16 if amp bias 98ma 4ma ifgnd ltc5544 ifbias if ? if + r1 (option to reduce dc power) 5544 f07 for optimum single-ended performance, the differential if outputs must be combined through an external if trans- former or discrete if balun circuit. the evaluation board (see figures 1 and 2) uses a 4:1 ratio if transformer for impedance transformation and differential to single - ended
ltc 5544 13 5544f a pplica t ions i n f or m a t ion discrete if balun matching for many applications, it is possible to replace the if tran sformer with the discrete if balun shown in figure 9. the values of l5, l6, c13 and c14 are calculated to realize a 180 phase shift at the desired if frequency and provide a 50 single-ended output, using the following equations. inductor l7 is used to cancel the internal capacitance c if and supplies bias voltage to the if pin. c15 is a dc blocking capacitor. l5, l6 = r if ? r out if c13, c14 = 1 if ? r if ? r out l7 = |x if | if these equations give a good starting point, but it is usually necessary to adjust the component values after building and testing the circuit. the final solution can be achieved with less iteration by considering the parasitics of l7 in the previous calculation. the typical performances of the ltc5544 using a discrete if balun matching and a transformer-based if matching are shown in figure 10. with an if frequency of 456mhz, the actual components values for the discrete balun are: l5, l6 = 36nh, l7 = 82nh and c13, c14 = 3.3pf measured if output return losses for transformer-based bandpass if matching and discrete balun if matching (456mhz if frequency) are plotted in figure 11. a discrete balun has less insertion loss than a balun transformer, but the if bandwidth of a discrete balun is less than that of a transformer. if amplifier bias the if amplifier delivers excellent performance with v ccif = 3.3 v, which allows the v cc and v ccif supplies to be common. with v ccif increased to 5 v, the rf input p1db increases by more than 3 db, at the expense of higher power consumption. mixer performance at 5250 mhz is shown in table 4 with v ccif = 3.3v and 5v. v cc l3 (or short) 13 14 15 16 if amp bias 98ma 4ma ifgnd ltc5544 ifbias if ? if + r1 (option to reduce dc power) 5544 f09 if out v ccif l7 l5 c13 c15 c14 l6 figure 9. if amplifier schematic with discrete if balun figure 10. conversion gain and iip3 vs rf frequency rf frequency (ghz) 4.5 18 g c (db) 26 24 22 20 28 3 11 9 7 5 13 4.7 6.3 4.9 5.1 5.3 5.5 5.7 5.9 6.1 5544 f10 iip3 g c tc4-1w-17ln+ balun discrete balun iip3 (dbm) if = 456mhz low side lo figure 11. if output return loss l1, l2 = 150 nh l1, l2 = 82nh l1, l2 = 39nh discrete balun 456mhz if frequency (mhz) 100 30 if port return loss (db) 15 10 5 20 25 0 150 200 250 300 5544 f11 350 400 450 500 550 600 table 4. performance comparison with v ccif = 3.3v and 5v (rf = 5250mhz, low side lo, if = 240mhz) v ccif (v) i ccif (ma) g c (db) p1db (dbm) iip3 (dbm) nf (db) 3.3 98 7.4 11.4 25.9 11.3 5.0 101 7.4 14.6 26.5 11.4
ltc 5544 14 5544f a pplica t ions i n f or m a t ion the ifbias pin (pin 16) is available for reducing the dc current consumption of the if amplifier, at the expense of reduced performance. this pin should be left open- circuited for optimum performance. the internal bias circuit pro- duces a 4 ma reference for the if amplifier, which causes the amplifier to draw approximately 98 ma. if resistor r1 is connected to pin 16 as shown in figure 6, a portion of the reference current can be shunted to ground, resulting in reduced if amplifier current. for example, r 1 = 1k will shunt away 1.5 ma from pin 16 and the if amplifier current will be reduced by 40% to approximately 59 ma. the nominal, open-circuit dc voltage at pin 16 is 2.1 v. table 5 lists rf performance at 5250 mhz versus if ampli- fier current. table 5. mixer performance with reduced if amplifier current (rf = 5250mhz, low side lo, if = 240mhz, v cc = v ccif = 3.3v) r1 (k) i ccif (ma) g c (db) iip3 (dbm) p1db (dbm) nf (db) open 98 7.4 25.9 11.4 11.3 4.7 89 7.2 25.7 11.5 11.4 2.2 77 6.9 25.2 11.6 11.5 1.0 59 6.3 23.8 11.3 11.6 (rf = 5250mhz, high side lo, if = 240mhz, v cc = v ccif = 3.3v) r1 (k) i ccif (ma) g c (db) iip3 (dbm) p1db (dbm) nf (db) open 98 7.3 24.0 11.4 11.7 4.7 89 7.0 23.8 11.4 11.9 2.2 77 6.6 23.5 11.4 12.2 1.0 59 5.8 22.6 11.3 12.4 shutdown interface figure 12 shows a simplified schematic of the shdn pin interface. to disable the chip, the shdn voltage must be higher than 3.0 v. if the shutdown function is not required, the shdn pin should be connected directly to gnd. the voltage at the shdn pin should never exceed the power supply voltage (v cc ) by more than 0.3 v. if this should occur, the supply current could be sourced through the esd diode, potentially damaging the ic. the shdn pin must be pulled high or low. if left floating, then the on/off state of the ic will be indeterminate. if a three-state condition can exist at the shdn pin , then a pull-up or pull-down resistor must be used. figure 12. shutdown input circuit figure 13. temp diode voltage vs junction temperature (t j ) ltc5544 4 shdn 500 v cc1 5544 f12 5 temperature diode the ltc5544 provides an on-chip diode at pin 12 (temp) for chip temperature measurement. pin 12 is connected to the anode of an internal esd diode with its cathode con- nected to internal ground. the chip temperature can be measured by injecting a constant dc current into pin 12 and measuring its dc voltage. the voltage vs temperature coefficient of the diode is about C1.73 mv/c with 10a current injected into the temp pin. figure 13 shows a typical temperature- voltage behavior when 10a and 80a currents are injected into pin 12. supply voltage ramping fast ramping of the supply voltage can cause a current glitch in the internal esd protection circuits. depending on the supply inductance, this could result in a supply volt- age transient that exceeds the maximum rating. a supply voltage ramp time of greater than 1 ms is recommended. junction temperature (c) ?40 temp diode voltage (mv) 600 850 900 0 40 80 500 750 550 800 450 400 700 650 ?20 20 60 100 5544 f13 80a 10a
ltc 5544 15 5544f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 4.00 0.10 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (wggc) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.55 0.20 1615 1 2 bottom view?exposed pad 2.15 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.30 0.05 0.65 bsc 0.200 ref 0.00 ? 0.05 (uf16) qfn 10-04 recommended solder pad pitch and dimensions 0.72 0.05 0.30 0.05 0.65 bsc 2.15 0.05 (4 sides) 2.90 0.05 4.35 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer uf package 16-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1692)
ltc 5544 16 5544f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0312 ? printed in usa typical a pplica t ion r ela t e d p ar t s part number description comments infrastructure ltc554x 600mhz to 6ghz 3.3v downconverting mixers 8db gain, 26dbm iip3, 10db nf, 3.3v/200ma supply lt ? 5527 400mhz to 3.7ghz, 5v downconverting mixer 2.3db gain, 23.5dbm iip3 and 12.5db nf at 1900mhz, 5v/78ma supply lt5557 400mhz to 3.8ghz, 3.3v downconverting mixer 2.9db gain, 24.7dbm iip3 and 11.7db nf at 1950mhz, 3.3v/82ma supply ltc559x 600mhz to 4.5ghz dual downconverting mixer family 8.5db gain, 26.5dbm iip3, 9.9db nf, 3.3v/380ma supply ltc5569 300mhz to 4ghz 3.3v dual downconverting mixer 2db gain, 26.8dbm iip3 and 11.7db nf at 1950mhz, 3.3v/180ma supply ltc6400-x 300mhz low distortion if amp/adc driver fixed gain of 8 db, 14db, 20db and 26db; >36dbm oip3 at 300 mhz, differential i/o ltc6416 2ghz 16-bit adc buffer 40dbm oip3 to 300mhz, programmable fast recovery output clamping ltc6412 31db linear analog vga 35dbm oip3 at 240mhz, continuous variable gain range C14db to 17db lt5554 ultralow distort if digital vga 48dbm oip3 at 200mhz, 2db to 18db gain range, 0.125db gain steps lt5578 400mhz to 2.7ghz upconverting mixer 27dbm oip3 at 900mhz, 24.2dbm at 1.95ghz, integrated rf transformer lt5579 1.5ghz to 3.8ghz upconverting mixer 27.3dbm oip3 at 2.14 ghz, nf = 9.9db, 3.3 v supply, single - ended lo and rf ports LTC5588-1 200mhz to 6ghz i/q modulator 31dbm oip3 at 2.14ghz, C160.6dbm/hz noise floor rf power detectors ltc5587 6ghz rms detector with 12-bit adc 40db dynamic range, 1db accuracy over temperature, 3ma current, 500ksps lt5581 6ghz low power rms detector 40db dynamic range, 1db accuracy over temperature, 1.5ma supply current ltc5582 40mhz to 10ghz rms detector 57db dynamic range, 0.5db accuracy over temperature, 0.2db linearity error ltc5583 dual 6ghz rms power detector up to 60db dynamic range, 0.5db accuracy over temperature, >50db isolation adcs ltc2208 16-bit, 130msps adc 78dbfs noise floor, >83db sfdr at 250mhz ltc2285 dual 14-bit, 125msps low power adc 72.4db snr, 88db sfdr, 790mw power consumption ltc2268-14 dual 14-bit, 125msps serial output adc 73.1db snr, 88db sfdr, 299mw power consumption if rf in 50 lo in 50 if out 50 bias v ccif 3.3v 2.2nh 22pf 1f 1000pf tm4-1 (synergy) rf shdn 22pf shdn v cc1 v cc 3.3v v cc2 lo 1.2pf 0.6pf if + ifgnd temp if ? 5544 ta02a 1f lo 1000pf 1000pf 3.3pf 22nh 22nh rf frequency (ghz) 4.9 5.1 5.3 5.5 5.7 5.9 6.1 6.3 5544 ta02b 10 28 30 iip3 (dbm), ssb nf (db) 24 26 20 16 12 22 18 14 0 9 10 g c (db) 7 8 5 3 1 6 4 2 iip3 g c ssb nf if = 900mhz low side lo 900mhz if output matching conversion gain, iip3 and nf vs rf frequency

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